//****************************************************************************************
// The interface to the LIS3DH.
// http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00274221.pdf
// http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/APPLICATION_NOTE/CD00290365.pdf
//
//   Created : 8 May 2012
//     Author: Wouter Cloete
//    Sponsor: Firmlogik (Pty) Ltd
//    License: GNU General Public License Version 3
//License URL: http://www.gnu.org/licenses/gpl.txt
//  Copyright: 2012 Firmlogik (Pty) Ltd 2012.  All rights reserved.
//        URL: http://www.firmlogik.co.za
//****************************************************************************************
#ifndef LIS3DH_H_
#define LIS3DH_H_
//****************************************************************************************
#include "i2c.h"
//****************************************************************************************
using namespace I2C;
//****************************************************************************************
namespace LIS3DH {
  typedef struct {
      u08 reserveda[7];
      u08 status_reg_aux;
      u08 out_adc1_l;
      u08 out_adc1_h;
      u08 out_adc2_l;
      u08 out_adc2_h;
      u08 out_adc3_l;
      u08 out_adc3_h;
      u08 int_counter_reg;
      u08 who_am_i;
      u08 reservedb[15];
      u08 temp_cfg_reg;
      u08 ctrl_reg1;
      u08 ctrl_reg2;
      u08 ctrl_reg3;
      u08 ctrl_reg4;
      u08 ctrl_reg5;
      u08 ctrl_reg6;
      u08 reference;
      u08 status_reg2;
      u08 out_x_l;
      u08 out_x_h;
      u08 out_y_l;
      u08 out_y_h;
      u08 out_z_l;
      u08 out_z_h;
      u08 fifo_ctrl_reg;
      u08 fifo_src_reg;
      u08 int1_cfg;
      u08 int1_source;
      u08 int1_ths;
      u08 int1_duration;
      u08 reservedc[4];
      u08 click_cfg;
      u08 click_src;
      u08 click_ths;
      u08 time_limit;
      u08 time_latency;
      u08 time_window;
  } sReg;
  //****************************************************************************************
  class Clis3dh {
      Ci2c* i2c;
    public:
      Clis3dh(Ci2c* i2c, ePinState A0) {
        u08 adr = 0x18;
        sReg* reg = 0;
        adr = (adr | A0);
        this->i2c = i2c;
        i2c->setBitrate(400);
        i2c->setDevAdr(adr);
        i2c->masterWrite(1, &reg->who_am_i);
      }
  };
//****************************************************************************************
}
#endif /* LIS3DH_H_ */
